UNLEASH THE CHIPLET AGE
SerDes
In today's data-driven world, chip interconnect speed is of paramount importance as it defines system performance. That's why we at EXTOLL have developed our high-speed SerDes family, engineered for ultra-low power interconnects serving different reaches. With a remarkable capability to deliver data transfer speeds of up to 32 Gbps in mainstream 28-12nm tech nodes, our SerDes technology sets a new standard for high-performance connectivity.
X-FEATURES
01
Outstanding Power Efficiency:
Our ultra-low power architecture allows for highest energy efficiency without compromising on performance.
03
Highest Speed:
Experience data transfer performance that push boundaries, ensuring your systems stay ahead of the competition.
02
Smallest Die Area:
Save expensive chip area and realize your cost benefits from an industry-leading footprint with minimal number of bumps.
04
Deterministic Low Latency:​
Our SerDes has built-in lowest and constant latency by design - allowing our customers easy system integration and full control over the data path.
SOLUTION
EXTOLL´s high-speed ultra-low power SerDes family is the ideal solution for businesses that require high-performance at lowest energy consumption. Customers often face power consumption as THE make-or-break criteria of a complex system architecture incorporating multiple dies with high-speed interconnects, especially in (AI) edge computing and 5G/6G communications.
With our unmatched offer we enable heterogeneous integration for a wide range of applications in (Edge-)AI, HPC, Industrial, Aerospace, Automotive, Communication and Consumer markets.
CUSTOMER BENEFITS
Super Flexible Configuration
Our Silicon-proven high-speed SerDes is customizable and can be tailored to your specific needs, allowing for greater flexibility in designing and optimizing
your systems.
Standard Applications
EXTOLL SerDes are designed to support all relevant industry standard applications like PCIe, JESD204, OIC, Ethernet, etc.
Common Architecture
22nm and 12nm SerDes families share a common digitally-centric architecture to allow customers easy migration of existing products: common implementation path, testing and debugging.
Easy Upgradability
SerDes families come with identical footprint and bump map for straightforward product migration from LR to XSR.
